Low-Power CMOS Circuits Technology, Logic Design and CAD Tools

The power consumption of integrated circuits (ICs) is considered one of the most important challenges of high-performance chips and of portable devices. In chapters drawn from Piguet's recently published Low-Power Electronics Design, this sharply focused volume covers all the low-level aspects of the design of low-power ICs in deep submicron technologies. It describes existing and future very deep submicron technologies as well as some completely different technologies, such as nanoelectronics and optical chips, that hold potential. The second part of the book describes techniques for reducing power consumption at the low level, and the final section presents CAD tools used to design low-power ICs.

The power consumption of microprocessors is one of the most important challenges of high-performance chips and portable devices. In chapters drawn from Piguet's recently published Low-Power Electronics Design, Low-Power CMOS Circuits: Technology, Logic Design, and CAD Tools addresses the design of low-power circuitry in deep submicron technologies. It provides a focused reference for specialists involved in designing low-power circuitry, from transistors to logic gates.The book is organized into three broad sections for convenient access. The first examines the history of low-power electronics along with a look at emerging and possible future technologies. It also considers other technologies, such as nanotechnologies and optical chips, that may be useful in designing integrated circuits. The second part explains the techniques used to reduce power consumption at low levels. These include clock gating, leakage reduction, interconnecting and communication on chips, and adiabatic circuits. The final section discusses various CAD tools for designing low-power circuits. This section includes three chapters that demonstrate the tools and low-power design issues at three major companies that produce logic synthesizers.Providing detailed examinations contributed by leading experts, Low-Power CMOS Circuits: Technology, Logic Design, and CAD Tools supplies authoritative information on how to design and model for high performance with low power consumption in modern integrated circuits. It is a must-read for anyone designing modern computers or embedded systems.

TECHNOLOGIES AND DEVICESHistory of Low-Power Electronics (Christian Piguet, CSEM&LAP-EPFL, Switzerland)Evolution of Deep Submicron Bulk and SOI Technologies (Marc Belleville, Olivier Faynot, CEA-LETI, Grenoble, France)Leakage in CMOS Nanometric Technologies (Antoni Ferré, Joan Figueras, UPC, Barcelona, Spain) Microelectronics, Nanoelectronics and the Future of Electronics" (Jing Wang, Mark Lundstrom, Purdue University, West Lafayette) Advanced Research in On-Chip Optical Interconnects (Ian O'Connor, Frédéric Gaffiot, Ecole Centrale de Lyon, Lyon, France)LOW-POWER CIRCUITSModeling for Designing in Deep Submicron Technologies (Daniel Auvergne, Philippe Maurine, Nadine Azémard, LIRMM, Montpellier, France)Logic Circuits and Standard Cells (Christian Piguet, CSEM&LAP-EPFL, Switzerland)Low-Power Very Fast Dynamic Logic Circuits (Jiren Yuan, Lund University, Sweden)Low-Power Arithmetic Operators (Arnaud Tisserand, INRIA, Lyon, France)Circuit Techniques for Dynamic Power Reduction (Dimitrios Soudris, Democritus University of Thrace, Greece)VHDL for Low-Power (Amara Amara, ISEP, Paris, France and Philippe Royannez, Texas Instruments, France) Clocking Multi-GHz Systems (Vojin G. Oklobdzija, Davis University, CA)Circuit Techniques for Leakage Reduction (Amit Agarwal, Chris H. Kim, Kaushik Roy, Purdue University)Low-Power and Low-Voltage Communication for SoCs (Christer Svensson, Linköping University, Sweden)Adiabatic and Clock-Powered Circuits (Lars Svensson, Chalmers University, Sweden)Weak Inversion for Ultimate Low-Power Logic (Eric A. Vittoz, CSEM, Switzerland)Robustness of Digital Circuits at Lower Voltages (Harry Veendrick, Philips, Netherlands)CAD TOOLS FOR LOW-POWERHigh Level Power Estimation and Analysis (Wolfgang Nebel, Oldenburg University, Germany, Domenik Helms, OFFIS, Germany)Power Macro-Models for High-Level Power Estimation (Enrico Macii, Politecnico di Torino, Italy, Massimo Poncino, Universita di Verona, Italy)Synopsys Low-Power Design Flow (Renu Mehra, Barry Pangrle, Synopsys Inc.)Magma Low Power Flow (Ed Huijbregts, Lars Kruse, Eric Seelen, Magma Design Automation Inc.)Sequence Design Flow for Low-Power Design (Jerry Frenkil, Sequence Design)