Computer-Aided Design for the Energy Optimization in the Memory Architecture of Embedded Systems, Florin Balasa and Dhiraj K. PradhanIntroduction Low-Power Design for Embedded Systems The Role of On-Chip Memories Optimization of the Energy Consumption of the Memory Subsystem The Goal and Organization of the Book The Power of Polyhedra, Doran K. WildeIntroduction PolyhedraRepresentation of Polyhedra in a ComputerDescription of OperationsLoop Nest Synthesis Using Polyhedral OperationsLocalizing Affine Dependences Computation of Data Storage Requirements for Affine Algorithmic Specifications, Florin Balasa, Hongwei Zhu, and Ilie I. LuicanIntroduction The Memory Size Computation Problem: A Brief Overview Computation of the Minimum Data Storage for Affine SpecificationsOperations with Linearly Bounded LatticesComputation of the Minimum Data StorageExperimental Results Conclusions Polyhedral Techniques for Parametric Memory Requirement Estimation, Philippe Clauss, Diego Garbervetsky, Vincent Loechner, and Sven VerdoolaegeIntroduction The Polyhedral Model of Loop NestsCounting the Elements in a Polyhedral SetMemory Requirement Estimates Based on Maximization ProblemsConclusion Storage Allocation for Streaming-Based Register File, Praveen Raghavan and Francky CatthoorStream Register File: Why and HowModel for Compilation on Stream Register FileSARA: StreAm-Register-Allocation-Based CompilationConclusion Optimization of the Dynamic Energy Consumption and Signal Mapping in Hierarchical Memory Organizations, Florin Balasa, Ilie I. Luican, Hongwei Zhu, and Doru V. NasuiIntroduction Energy-Aware Signal Assignment to the Memory Layers Signal-to-Memory Mapping TechniquesThe Signal-to-Memory Mapping ModelExperimental Results Conclusions Leakage Current Mechanisms and Estimation in Memories and Logic, Ashoka Sathanur, Praveen Raghavan, Stefan Cosemans, and Wim DahaeneIntroduction Leakage Current MechanismsPower Breakdown in SoCs Leakage Current Modeling and Estimation Leakage Control in SoCs, Praveen Raghavan, Ashoka Sathanur, Stefan Cosemans, and Wim DahaeneLeakage Power Reduction TechniquesLeakage Power Reduction Techniques Applied to SRAM MemoriesLeakage Power Reduction Using Low Power EDA Flows Compiler-Driven Leakage Power Reduction Energy-Efficient Memory Port Assignment, Preeti Ranjan Panda and Lakshmikantam ChitturiIntroduction Background Illustrative Examples Memory Energy-Aware SynthesisExperimentsConclusion Energy-Efficient Address-Generation Units and Their Design Methodology, Ittetsu Taniguchi, Guillermo Talavera, and Francky CatthoorIntroduction Motivation behind Exploration of AGUsReconfigurable AGU: What Do We Execute the Calculations on? Architecture Exploration Problem: What Is the Optimal Solution? AGU Mapping Framework: How Is the Address Calculation Mapped on the AGU Model? AGU Exploration Framework: How Are Pareto Solutions Obtained from the Solution Space?Experimental Results Conclusion and Future Work Exercises Index References appear at the end of each chapter.
