Verilog Coding for Logic Synthesis

TRAMA

Verilog is a Hardware Description Language (HDL) used to design and document electronic systems. Verilog HDL allows designers to virtually design systems without expending time or resources on physical models. It is the most widely used HDL with a user community of more than 50,000 active designers. This will be the first book on VHDL to concentrate on practical issues while keeping theoretical issues to a minimum.

ALTRE INFORMAZIONI

• Condizione: Nuovo
• ISBN: 9780471429760
• Dimensioni: 240 x 23.11 x 166 mm Ø 660 gr
• Formato: Copertina rigida
• Pagine Arabe: 310